HF103 - ARM firmware

The analog to digital converter (ADC) and the USB3.0 controller (FX3) are the main hardware components of HF103.

HF103 block diagram

The FX3 firmware sends the ADC output data stream to the USB3.0 host. Let's take a look inside the ADC and FX3 chip architecture.

HF103_FX3 is the name of HF103 ARM firmware. This is a redraw from my previous BBRF103 FX3 code after a first reading of the book SuperSpeed Device Design ByExample John Hyde. I found it very useful in learning the FX3 software architecture and coding.

I followed the book Project template, using the same name for files. Please refer to the book to have a far better description of the architecture.

RunApplication.c is the application thread.
USB_Handler.c manages USB traffic.
USB_Descriptors.c defines the descriptors.
StartStopApplication.c starts and stop application.
DebugConsole.c is a debugging console.
Support.c here are support procedures.
Startup.c sets up the FX3 environment for the program.
cyfxtx.c defines the porting required for the ThreadX RTOS.
cyfx_gcc_startup.c Cypress FX3 Firmware Startup code.

The debugging console sends and receives debugging commands via the auxiliary USB serial port of the FX3 SuperSpeed kit. This a useful tool to debug the code of FX3.
The communication between callback routines and debugging console are via a queue.
The serial debug console shows the initializing sequence and at run time a counter every second and events from callback routines..:

Note that HF103_FX3 code differs from BBRF103 in the following points:
- There is no R820T2 VHF/UHF tuner. It runs 0-30MHz HF.
- It uses a fixed oscillator at 64.000000 MHz,  no S5351A synthesizer.
- It doesn't use the I2C bus.
- It has a LNA and a programmable attenuator.

Here: ( https://drive.google.com/file/d/19yrSX8WjWy6tvt3mDKdnhbEIfPnfi-xc/view?usp=sharing )
the HF103_FX3 source code project, first release v 1.00  rc1.



  1. Hello,
    Definitely i2c and S5351A should be returned. They was cherry picking up the receiver giving enormous flexibility. Plese return it.

    1. Certainly the Si5351a has some advantages, however it has some spurious signals and phase noise. A good quartz oscillator with low phase noise allows to obtain less spurious and a noise figure (6 dB better in my test). I think that the two architectures are valid for different purposes and maybe someone will design an SDR with the possibility from software to choose more clock sources.

  2. Also what is needed is block or better,character device for linux /dev/ .then posibilities are unlimited,including for your own applications.

    1. The group https://groups.io/g/NextGenSDRs is developing an open source Linux oriented library. I have no experience in the Linux world, but fortunately some experts are interested in the challenge.


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