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When Justin used a 128 MHz clock for the ADC  I simply thought that it was not possible. I based this to the FX3014 specs that state the upper limit of GPIFII to 100MHz.   He was right and this kind of overclocking is possible, maybe because we don't use the FX3 in an extended temperature range or maybe because the GIPIFII state machine we use is simple. The transfer rate of the USB stream raises to 128 Msps with 16 bit samples i.e. 256 MBs. This requires a quite fast PC and it may raise some more problems in the transfer.  Nevertheless it runs on my PC (I7-3770)  and offers another advantage other than wider bandwidth. Howard Su noticed that the noise level when running in 128M mode decreases by some 3dB while the signals remain with the same amplitude.  What's happening is that we have a 3dB decimation gain as explained in   https://www.analog.com/en/ technical-articles/analog- tips-decimation-for-adcs.html  : " ... The SNR calculation of an ideal ADC must account for th

We need Experimenters' feedback to validate and test  this  release candidate.   ExtIO_sddc.dll v1.1 RC1 The source repository contains code from many co-authors.  I owe special thanks to Hayati Ayguen, Howard Su, Franco Venturi, Justin Peng and all the Others, their efforts are greatly appreciated and fundamental to the growth of this project. I'm learning a lot from them. Improvements - This release detects the following hardware BBRF103, RX888, HF103, RX888r2, RX999. - Supports 128M ADC sampling rate selection in the dialog GUI (Justin Peng and Howard Su). - Use of libsddc allows development of Linux support and Soapy integration (Franco Venturi    https://github.com/fventuri/libsddc  ). - Tune the LO with a 1Hz step everywhere (Hayati Ayguen  https://github.com/hayguen/pffft ). Possibly it will allow use of ExtIO_sddc.dll with  SDR applications other than HDSDR. - Move multi thread r2iq to a multi thread pipeline model to better leverage multi cores. Remove callback in USB